The next-generation computing market is set to experience a six-fold surge from 2024 to 2033, driven by a compound annual growth rate (CAGR) exceeding 19%. This escalating demand for computing power underscores the need for optimal low-power and high-performance solutions.
This seminar will explore technological opportunities and design solutions to enhance product performance and power efficiency.
Jie Deng,
Qualcomm Process Technology & Foundry Engineering Team
We will review the current state of transistor, interconnect, and packaging technologies and their challenges. Additionally, we will delve into emerging technologies for next-generation low-power, high-performance computing, including advancements in transistors, interconnects, and packaging technologies. A projected timeline for producing and applying these emerging technologies will also be presented.
We will examine the rapid growth of on-device AI and discuss how heterogeneous computing platforms can meet the increasing performance demands and power challenges of edge computing. The session will also address the associated challenges.
Jie Deng received his B.S. degree in electronics from Beijing University and his Ph.D. in electrical engineering from Stanford University. In 2007, he joined the IBM Semiconductor Research and Development Center (SRDC) in Wappingers Falls, NY, where he worked on device research and development for low-power and high-performance logic technology from the 65nm node to the 14nm node.
Since 2013, he has been with the Qualcomm Process Technology & Foundry Engineering Team, working on advanced nodes for High-Volume Manufacturing (HVM) products bring-up and foundry engagement, spanning from the 14nm node to the 2nm node. He also leads a team responsible for tech node evaluation and product roadmap planning, including tech node selection. Jie Deng has authored and co-authored over 40 papers in journals and international conferences on semiconductor technology.