Understanding Fundamental Material Limitations to Enable Advanced Detector Design

Feb
24

Understanding Fundamental Material Limitations to Enable Advanced Detector Design

Enrico Bellotti, Boston University

11:30 a.m., February 24, 2023   |   310 DeBartolo Hall

A new class of devices based on III-V semiconductors has emerged as a potential alternative to more established technologies for imaging applications in the infrared spectral band. To fully exploit these materials and their related device structures, and minimize the risk associated with transitioning this technology into production, it is necessary to develop methodologies that can reliably predict their properties.

Enrico Bellotti
Enrico Bellotti

This talk will discuss three research activities performed within the Center for Semiconductor Modelling (CSM) intended to address these issues at different scales. The first research activity addresses the development of a model to describe InAsSb alloy properties when the material is subjected to an arbitrary mechanical stress resulting from a curved pixel array. This effort combines the use of DFT-based electronic structure calculation methodologies with machine learning techniques.

The second part of the talk will focus on the properties of the pixel detector and will elucidate the physics of carrier collection in InAs/InAsSb superlattices. Using a quantum mechanical transport model, it will be shown that the antimony migration process in superlattices is responsible for the limited carrier collection. Furthermore, a quantitative model that reproduces experimental data will be discussed.

The last part of the talk will address the development of tools that enable the efficient analysis of data obtained from fabricated detector structures and their use to augment the optimization of the device design using a combination of conventional device modeling and machine learning.

Enrico Bellotti received the “Laurea in Ingegneria Electronica” degree from Politecnico di Milano, Milano, Italy, in 1989, and the Ph.D. degree in electrical engineering from the Georgia Institute of Technology, Atlanta, USA, in 1999. He joined the Department of Electrical and Computer Engineering, Boston University in 2000 as an Assistant Professor and was promoted to Full Professor in 2013. He has over 30 years of experience in the area of computational electronics. He has developed high-performance simulation codes to study carrier transport in a variety of semiconductor material systems and related devices. He has authored or co-authored over 130 journal papers, 100 conference papers, and 4 book chapters. He is the holder of three U.S. patents. He was a recipient of the 2003 ONR Young Investigator Program Award and the 2005 NSF CAREER Award. He is currently the director of the U.S. Army Research Laboratory Funded Consortium for Semiconductor Modeling. Dr. Bellotti is member of IEEE and SPIE.